The present invention relates to mounting and connection devices and in particular mounting and connecting microelectronic units such as semiconductor chips on printed wire boards.
Early methods of mounting and connecting semiconductor chips to printed wire boards frequently resulted in unreliable connections. Specifically, the early methods provided an electrical connection between a semiconductor chip and a printed wire board that consisted of a solder joint. This type of connection was suitable for normal environments, such as a desk top use. However, boards also can be used in other environments subjecting the board and chip to vibrations and temperature changes. The vibrations frequently caused fatigue failures in the solder joints. Temperature changes also caused connection failures due to the difference in the thermal coefficient of expansion for the semiconductor chips and the printed wire board. For example, the printed wire boards frequently have a thermal coefficient of expansion (for example, 18.times.10.sup.-6 inch/inch .degree. C.) that is about three times greater than the thermal coefficient of expansion for the semiconductor chips (for example, 6.times.10.sup.-6 inch/inch .degree. C.). Accordingly, when the chip mounted board was subject to temperature changes, the difference in the thermal coefficient of expansion between the semiconductor chip and printed wire board would exert strain on the solder joint therebetween ultimately resulting in a broken connection between the chip and the printed wire board.
Further improvements in connecting semiconductor chips to printed wire boards were developed to solve this problem. Specifically, the semiconductor chips were configured to have leads arranged about the periphery or border of the chip. This configuration is known as a peripheral grid array (PGA) chip. To overcome the problems caused by the differing thermal coefficient of expansion between the PGA chips and the printed wire boards, the leads on the chip were formed into an S-shape so that the lead could compensate for the differing thermal coefficients of expansion for the PGA chip and the printed wire board during temperature changes or vibration. See U.S. Pat. No. 4,827,611, U.S. Pat. No. 5,294,039, and U.S. Pat. No. 5,317,479.
However, because of the drive to miniaturize semiconductor chip and printed wire board assemblies, the S-shaped lead left too much space between the surface of the printed wire board and the semiconductor chip. Accordingly, a C-shaped lead was developed to reduce the spacing between the surface of the chip and the printed wire board thereby yielding a mounted chip with a lower profile than with a S-shaped lead. The shape of the C-lead however, still allowed the lead to compensate for the differing thermal coefficients of expansion of the chip and printed wire board during temperature changes and vibrations.
The C-shaped lead and the S-shaped lead were sufficient to deal with the problem of differing thermal coefficients of expansion between the PGA semiconductor chips and the printed wire board until the advent of area grid array (AGA) semiconductor chips. With area grid array (AGA) chips, the conductive connecting surface pads of the chip are arranged in a matrix or an array that is connected to a reciprocal matrix of connecting surfaces on the printed wire board. These AGA chips are connected to the printed wire board matrix by solder joints shaped in the form of solder balls resulting the AGA chips sometimes being referred to as ball grid arrays (BGA). These solder balls or spheres are typically made from conventional solder (63 weight percent tin and 37 weight percent lead, 10 weight percent tin and 90 weight percent lead, or an equivalent alloy). However, like the original semiconductor solder joints, these solder ball joints connecting AGA chips to the printed wire board are not very reliable under temperature changes or mechanical stresses like vibrations. Moreover, once an AGA chip is mounted on a printed wire board, it is difficult to access a connection point between a single conductive pad on the AGA chip and a reciprocal conductive pad on the printed wire board. Accordingly, with a solder ball joint failure, the entire AGA chip must be removed from the printed wire board to correct the bad connection. While AGA chips permit further miniaturization of printed wire boards by consolidating the space required to connect the chips to the board, the reliability problems associated with solder joints between semiconductor chips and printed wire boards resurfaced.
One attempted solution includes the use of solder columns instead of solder ball spheres. The solder columns are typically made of solder alloy having a composition of 10 weight percent tin and 90 weight percent lead. However, solder columns do not provide improved strength or reliability over solder balls. In addition, the high lead content of this solder alloy is highly undesirable because of heavy environmental pressures to avoid introducing additional lead into the environment.
Finally, some attempts have been made to use a conductive lead to connect an AGA chip to a printed wire board. For example, U.S. Pat. No. 5,455,390 discloses a method for placing a plurality of conductive connecting leads between the conductive surface pads of the AGA chip and the connecting surface pads of the printed wire board. However, this method still results in connection failures due to the less reliable type of material (e.g., gold) used to make the conductive connecting leads.